Abstract

A field-powered UHF RFID transponder consists of an antenna and a transponder IC, without a battery. The DC power required to operate the transponder is generated by converting the incoming RF field to a DC supply using a high efficiency RF to DC converter (RDC). Government regulations limit the RF power transmitted, resulting in a few microwatts of DC power available from the RDC, to operate the transponder. This dissertation addresses many aspects of the design of a high efficiency and ultra-low power RF and Analog Front End (RF-AFE) for UHF RFID. The design includes RDC, system clock generator, EEPROM controller, DC limiter/regulator and data demodulator. A new RF to DC conversion model is proposed for the design of the RDC that enables optimization with a low-cost printed antenna. This improves the RF to DC conversion efficiency and therefore the operational range of the transponder. The system clock generator is a nano-power oscillator operating from a reduced supply voltage by adopting a proposed Minimum-Supply-Voltage-Constraint. Additionally, a low-voltage V_GS/R reference is presented that stabilizes the oscillation frequency over supply and temperature variations. The EEPROM controller includes a gated clock regulation loop to keep the programming voltage constant over a wide range of received RF power. This improves the write-erase endurance of the memory. Also, a current surge control scheme is presented to prevent the collapse of the rectified supply at the initial startup phase of the EEPROM charge pump. The DC limiter/regulator is designed for nano power operation during low RF power, while providing device protection during high RF power. Finally, the proposed data demodulator replaces a preamp and dynamic latch, over the conventional high gain comparator, resulting in over a 2X power reduction.

Prototype chips for the RF-AFE receive circuits are implemented in 130nm CMOS, and the EEPROM controller is implemented in 0.35μm CMOS. Test results show the receiver DC power consumption for the RF-AFE is 1.2μW, and the EEPROM test chip consumes 7μW. The RF to DC converter test chip operates at an efficiency of 20% at a - 16dBm input power and a 5μA load.